What considerations go into predicting latency for operations on modern superscalar processors and how can I calculate them by hand?

performancecpu-architectureassemblyx86-64latency
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How exactly do partial registers on Haswell/Skylake perform? Writing AL seems to have a false dependency on RAX, and AH is inconsistent

cpu-architectureassemblyx86micro-optimizationintel
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Enhanced REP MOVSB for memcpy

performancecpu-architectureassemblyx86memcpy
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